1. Field of the invention
The present invention relates to a method of evaluating a semiconductor wafer. In particular, it relates to a method of evaluating a semiconductor wafer, which is suitable for judging the quality of a mirror-polishing process and the quality of the polishing process.
2. Description of the Related Art
Semiconductor devices are usually manufactured by a silicon wafer which has at least one mirror-polished surface and is obtained by slicing a silicon single crystal manufactured by using the CZ method or the FZ method, chamfering the periphery, grinding the surface and reverse surface, lapping, polishing and heat treating.
In recent years, with the scaling-down of semiconductor devices and the high degree of integration, the dielectric strength of thermally grown oxide film characteristic has particularly received attention. One cause that lowers the dielectric strength of thermally grown oxide film of LSI is the processing flaw or the residual stress produced in the process of grinding and polishing for the mirror surface finish of the silicon wafer. The degree of the damage of the wafer surface caused by processing can be evaluated by means of measuring the dielectric strength of thermally grown oxide film.
The method for evaluating the dielectric strength of thermally grown oxide film of a silicon wafer is carried out by the following procedures. First, the mirror-polishing processed silicon wafer is cleaned and then is heat-treated in an oxidizing atmosphere to form a thermal oxide film on the wafer surface. Next, a polysilicon layer is formed on the thermal oxide film by the CVD method, and then a predetermined number of electrodes having a predetermined area are formed by photolithography. By subjecting the wafer to these procedures, a MOS capacitor in which an insulating layer of thermal oxide film is disposed between the electrodes and the silicon wafer is formed. Thereafter, a voltage is applied between the electrodes and the silicon wafer, and the electric current is measured while the applied voltage is raised in a predetermined step. The current-voltage characteristic obtained by this measurement is referred as the I-V characteristic. In this I-V characteristic, the electric field causes a certain leakage current leaks through the insulating layer, for example a current of 10 .mu.A, is deemed "the dielectric breakdown electric field of the insulating layer".
When the wafer to be evaluated is a p-type semiconductor, the voltage is applied from the side of the wafer 1 as shown in FIG. 5. That is, the electrons inject from the side of the electrode 2. As a result, an I-V characteristic diagram as shown in FIG. 6 is obtained. In FIG. 6, "A", "B", "C" and "D" are the symbols for distinguishing mirror-polishing line or mirror-polishing process. "A" represents a wafer obtained by normal processing, and following the "B", "C" and "D" order, the degree of the damage of the wafer due to the processing deteriorates. That is, wafer "A" has the highest dielectric breakdown electric field, while the dielectric breakdown electric field decreases according to the order of "B", "C" and "D".
In contrast, when the wafer to be evaluated is an n-type semiconductor, the voltage is applied from the electrode 2 as shown in FIG. 7. That is, the electrons inject from the silicon wafer 1. As a result, the I-V characteristic diagram as shown in FIG. 8 is obtained.
Applying grinding and polishing for the purpose of mirror-polishing the silicon wafer subjects the wafer surface to some processing injuries such as scratchs which can not be identified visually, or local residual stress which also can not be identified visually. The above processing injuries are hereinafter referred as processing defects. The above processing defects of the wafer surface conventionally are evaluated by the dielectric strength of thermally grown oxide film evaluation method in which electrons are injected (voltages are applied) to cause majority carriers to enter an accumulated state. Accordingly, for p-type semiconductor, as shown in FIG. 6, it is possible to distinguish "A", no processing defects, and "B", "C" and "D", having different degree of processing defects, and to read the intensity of the electric field. However, for n-type semiconductor, as can be seen from the I-V characteristic curve of FIG. 8, compared to "A", with no processing defects, it is very difficult to distinguish "B", "C" and "D". And thus it is not possible to precisely detect whether there are processing defects.